Validating Complex 3D Full-wave Extraction for Package-board Simulations
At Designcon 2010, engineers from Physware and industry experts discussed accurate approaches to validate complex package-board simulations. Such methodologies are critical for choosing the right tools, comparing against different approaches, and making sure the designer’s toolset contains the right extractors and simulators! In the post-presentation discussion, there were several requests to make the methodologies open through a public forum or through an IEEE standard. These developments are in progress. Stay tuned for more on this critical topic of validation in chip-package-board environments!
4-WA2
An Accurate Methodology for Model-to-hardware Calibration and Correlation with PCB-package Simulation Using Electromagnetic Solvers.
Wednesday, February 3 | 9:20 am – 10:00 am
Dr. Souvik Mukherjee, Signal Integrity Engineer, Texas Instruments, Dr. Dipanjan Gope, Vice-President, R&D, Physware Inc., Dr. Rajen Murugan, Signal Integrity Engineer, Texas Instruments, Dr. Vikram Jandhyala, CTO, Physware Inc., Dr. Django Trombley, RF Characterization Engineer, Texas Instruments
Abstract: This paper presents an accurate simulation, hardware development and measurement methodology to accurately characterize electrical performance metrics of packages and PCBs. This is addressed by developing a dedicated PCB and package test vehicle, measurement and simulation setup of impedance on power delivery nets and cross-coupling between a set of aggressor and victim signal nets. In order to address simulation accuracy with required efficiency, appropriate algorithms have been evaluated. Benchmarking of different modeling techniques have been performed against measurements in order to scope applicability of commercially available EM solvers.
What to Ask of Your Electromagnetic Field Solver for System-Level SSN-SSO
Simultaneous switching noise (SSN) – outputs (SSO) embodies in many ways the culmination of the most difficult challenges in signal integrity (SI) and power integrity (PI) modeling. Here are some reasons why this is such a challenging problem, and one where many questions need to be asked of the electromagnetic (EM) field solvers being used to address this problem.
1. Problem definition: Some excellent resources exist on the web that describe the SSN-SSO problem, such as these public documents from Cadence, Actel, and EE Times Asia / Altera. In essence, this problem is a coupled SI-PI problem that looks at effects of signal switching on power-ground noise and of the resultant noise coupling back onto signal paths.
2. Challenges of scale: SSN-SSO simulation requires complete models for on-chip parasitics, packages, and boards with all power and ground planes and signal paths!
3. Challenges of complexity: SSN-SSO simulation needs the EM solver to model intricate complexities such as split planes, fringing, radiation, interfaces between chip and package, and package and board, via-trace transitions, effects of anti-pads, voids, metal boundaries, and complex frequency-dependent material effects.
4. Challenges of dynamic range and accuracy: One of the reasons for modeling all the complexity above is the fact that SSN-SSO simulation requires a higher dynamic range than most other SI/PI/EMI simulations. The noise levels from power to signal and signal to power are very different and both are important. The impedances of power grids (ideally as small as possible) and signal lines (typically 50 Ohms) are significantly different. Reduced voltage levels, differential signaling, and high-speed signals all contribute to the requirements for high dynamic range and high accuracy.
5. What EM simulation challenges does SSN-SSO simulation imply?
Consider again some of the challenges discussed. Frequencies will often range in the multi-GHz range due to the co-existence of signal waveforms and short rise-time-based inductive noise. This disallows the use of 3D static or quasi-static solvers, as the right phase variation and multiple resonance behavior will not be captured. Time domain SSN-SSO simulation is necessitated in SPICE-like solvers. This implies that the S-parameter models generated by the 3D full-wave solvers need to be broadband, from DC to the highest multi-GHz frequency. Considering the existence of 50 Ohm signal lines and very low impedance lines in the SI-PI cosimulation, the EM solver must not compromise on accuracy so that a high dynamic range can be properly met. The 3D nature of many discontinuties and signal-power coupling, especially in low-cost cutting-edge designs implies that 2.5D solvers that are often used for PI applications, such as those based on TEM approximations, are typically not suited for the overall SSN-SSO simulation.
6. Summary: What to ask of your EM solver!
The EM solver needs to have very stringent requirements of handling chip-package-board models and interface effects, 3D geometries and 3D full-wave field effects, accuracy and high dynamic range, the appropriate speed and scalability to handle the SSN-SSO scenario, and a broadband nature to create SPICE models and S-parameter models with both DC and high-frequency multi-GHz effects. This is extremely challenging and beyond the ability of most commercial solvers, many of which are quasi-static or 2.5D in nature. On the other hand 3D solvers tend to handle much smaller scales than needed with high simulation times!
