CWS and Physware Enable Early co-Design for Mixed-Signal Systems

CWS and Physware Enable Early co-Design for Mixed-Signal Systems

 
CWS’s noise simulation for mixed-signal chips and Physware’s SI-PI-EMI models for chip-through-system enable co-design involving system-level noise and EMI prediction and mitigation

AUSTIN, TX and BELLEVUE, WA – July 10, 2009 – CWS and Physware, Inc, today, jointly released a white paper, titled “ Enabling System-level Electrical Co-design for Mixed-Signal System”. Utilizing the combined strengths in noise simulation for mixed-signal chips and SI-PI-EMI models for chip-through-system respectively, CWS and Physware, successfully addressed the challenging problem of early co-design involving system-level noise and EMI prediction and mitigation.

The CWS-Physware integrated solution offers customers, for the first time at a complete scale and with full accuracy, the ability to estimate EMI and system-level noise effects produced by mixed-signal coupling on chip.  Early in the co-design process, the joint solution enables detection of noise injection from both digital and analog/RF blocks and impact on sensitive analog/RF components such as low-noise amplifiers through the entire system, enabling early EMI prediction and what-if capability for redesign on chip, at the package, on the board, and in embedded passives and decoupling capacitors.  

To learn more about the novel joint early co-design solution for mixed-signal systems, visit the CWS and Physware booths at the Design Automation Conference, San Francisco, July 27th - July 30th, 2009. To learn more about CWS Click Here. To schedule a CWS demo  (Booth #608)  at DAC, Click Here.  To learn more about Physware, Click Here. To schedule a Physware demo (Booth #1814) at DAC, Click Here.

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Media Contact: 

Bala Vishwanath, Physware, Inc., 425-458-0597, media@physware.com   

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